The present invention relates to transmission systems for transmitting analog data on an unshielded twisted pair (UTP) of wires. More specifically, this invention is directed to an integrated gigabit Ethernet transmitter.
The past few years has witnessed an almost exponential growth in the extent of high speed data networks, and the data transmission speeds contemplated over such networks. In particular, bidirectional data transmission in accordance with the various Ethernet network protocols, over unshielded twisted pair (UTP) wiring, has emerged as the network implementation of choice for general commercial LAN installations as well as for some of the more prosaic residential and academic applications.
Local Area Networks (LAN) provide network connectivity for personal computers, workstations and servers. Ethernet, in its original 10BASE-T form, remains the dominant network technology for LANs. However, among the high speed LAN technologies available today, Fast Ethernet, or 100BASE-T, has become the leading choice. Fast Ethernet technology provides a smooth, non-disruptive evolution from the 10 megabits per second (Mbps) performance of the 10BASE-T to the 100 Mbps performance of the 100BASE-T. The growing use of 100BASE-T connections to servers and desktops is creating a definite need for an even higher speed network technology at the backbone and server level.
The most appropriate solution to this need, now in development, is Gigabit Ethernet. Gigabit Ethernet will provide 1 gigabit per second (Gbps) bandwidth with the simplicity of Ethernet at lower cost than other technologies of comparable speed, and will offer a smooth upgrade path for current Ethernet installations. With increased speed of Gigabit Ethernet data transmission, it is evident that EMI emission and line reflections will cause the transmitted signal to become substantially impaired in the absence of some methodology for filtering the transmitted data.
Therefore, there is a need for an integrated transmitter in a data transmission system for pulse shaping digital input data and reducing EMI emissions, implemented with relatively simple circuitry.
The aforementioned need in the art for an integrated transmitter in a data transmission system is addressed by storing data representing desired results of the digital filter and the DAC decoder in a memory device such as a ROM. The integrated digital filter and DAC decoder is used in a data transmission system for pulse shaping digital input data and generating synchronized DAC control signals. A number of shift registers (corresponding to the order of the digital filter) time shift the digital input data. A control logic retrieves respective ROM data to produce the desired filtered and decoded data according to the time shifted input data and a multiplexer is used for time multiplexing and synchronizing the retrieved ROM data. The output of the multiplexer drives the DAC output driver cells.
When implemented in such manner, the logical implementation and memory replaces digital filtering circuits, DAC decoding logic circuit and re-synchronization logic circuits that are conventionally implemented in hardware. Thus, the hardware functionality of these circuits is rendered into arithmetic form and implemented in a memory device.
In one embodiment of the present invention, the digital filter is a Finite Impulse Response (FIR) filter. To perform an interpolation function for wave shaping of the transmit signal, a weighted sum of the present and past input signals is calculated to produce the output of the filter and the weighted sum is determined by selection of filter coefficients.